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Added support for option bytes to F1xx_XLD (GD32F30x) #1250

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Merged
Nightwalker-87 merged 3 commits into from
Jul 14, 2022
Merged

Added support for option bytes to F1xx_XLD (GD32F30x) #1250

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a5696f2
Define option byte properties for F1xx_XLD
simon-wh May 20, 2022
9a7805e
Include GD32F303CGT6 in devices_boards.md
simon-wh May 20, 2022
54e8234
Fix writing to 'BANK_2' in flash type F1_XL
simon-wh Jun 30, 2022
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4 changes: 2 additions & 2 deletions config/chips/F1xx_XLD.chip
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Expand Up @@ -9,6 +9,6 @@ flash_pagesize 0x800 // 2 KB
sram_size 0x18000 // 96 KB
bootrom_base 0x1fffe000
bootrom_size 0x1800 // 6 KB
option_base 0x0
option_size 0x0
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE
option_size 0x10 // 16 B
flags swo
1 change: 1 addition & 0 deletions doc/devices_boards.md
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Expand Up @@ -90,6 +90,7 @@ Tested non-official ST boards [incl. STLINK programmers]:
| Product-Code | Chip-ID | STLINK<br />Programmer | Boards |
| ------------ | ------- | ---------------------- | ---------------------------------- |
| GD32F303VGT6 | 0x430 | [v2] | STM32F303 clone from GigaDevice GD |
| GD32F303CGT6 | 0x430 | [v2] | STM32F303 clone from GigaDevice GD |

## STM32F4 / ARM Cortex M4F

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2 changes: 1 addition & 1 deletion src/flashloader.c
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Expand Up @@ -94,7 +94,7 @@ static void set_flash_cr_pg(stlink_t *sl, unsigned bank) {
cr_reg = (bank == BANK_1) ? FLASH_H7_CR1 : FLASH_H7_CR2;
x |= (1 << FLASH_H7_CR_PG);
} else {
cr_reg = FLASH_CR;
cr_reg = (bank == BANK_1) ? FLASH_CR : FLASH_CR2;
x = (1 << FLASH_CR_PG);
}

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